3.15.2. Signal descriptions

Table 3.40 lists non-AMBA signals that the interrupt controller uses.

Table 3.40. Interrupt controller signals

Signal

Type

Direction

Description

HSELIC

Input

Decoder

Slave select signal. This is a combinatorial decode of the address bus. It indicates that the current transfer is intended for the selected slave.

ICINTSOURCE[31:0]

Input

Peripheral interrupt request

Interrupt source input. Unused interrupt lines must be tied LOW to disable them.

ICVECTADDRIN[31:0]

Input

External interrupt controller

Connects to the ICVECTADDROUT[31:0] signal of the previous interrupt controller if daisy chaining is used.

Connects to logic 0 if the interrupt controller is not daisy-chained.

ICVECTADDROUT[31:0]

Output

Interrupt controller

Connects to the ICVECTADDRIN[31:0] signal of the next interrupt controller if daisy chaining is used.

Leave unconnected if the interrupt controller is not daisy-chained.

nICFIQ

Output

Interrupt controller

Fast interrupt request to processor.

nICFIQIN

Input

External interrupt controller

Connects to the nICFIQ signal of the previous interrupt controller if daisy chaining is used.

Connects to logic 1 if the interrupt controller is the last in the daisy chain, or if interrupt controller is not daisy-chained.

nICIRQ

Output

Interrupt controller

Interrupt request to processor.

nICIRQIN

Input

External interrupt controller

Connects to the nICIRQ signal of the previous interrupt controller if daisy chaining is used.

Connects to logic 1 if the interrupt controller is the last in the daisy chain, or if interrupt controller is not daisy-chained.

SCANENABLE

Input

Scan controller

Scan enable.

SCANINHCLK

Input

Scan controller

Scan data input for HCLK domain.

SCANOUTHCLK

Output

Scan controller

Scan data output for HCLK domain.

Note

For a description of the AMBA signals used by the interrupt controller, see AMBA signals.

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