5.2.1. Programmer’s model

Table 5.3 lists the user-defined settings for the internal RAM module

Table 5.3. User-defined settings for the internal RAM module

Signal

Type

Default

setting

Description

FILENAME

Input filename

intram.dat

This signal points to the local input data file that is read in after reset

MEMBITS

Memory address width

12

This signal sets the number of used address bits

Memory initialization from local data file

On simulation initialization, the internal memory module loads in data from the file specified in the FileName setting. This file must be stored as an 8-character Verilog $readmemh format data file, for Verilog format models, that cannot contain more data than the model supports. Address lines, starting with @, and single line comments, starting with //, are valid, but all other non-value characters are not. Loading starts from address zero, and continues incrementing on word boundaries until an address line is found in the file. Loading then continues from that address. All values are initialized to zero before loading is started. Example 5.1 shows an example intram.dat file.

Example 5.1. intran.dat file

ea00000b
ea000005
// Data values stored at 0x00000200
@00000200
01234567
89ABCDEF
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