3.3.11. Register 12, Address Filtering

When two masters are implemented, you can redirect a whole address range to master 1 (M1).

When address_filtering_enable is set, all accesses with address >= address_filtering_start and < address_filtering_end are automatically directed to M1. All other accesses are directed to M0.

This feature is programmed using two registers.

Address Filtering Start Register

The Address Filtering Start Register is a read and write register. Figure 3.12 shows the register bit assignments.

Figure 3.12. Address Filtering Start Register bit assignments

Table 3.35 shows the register bit assignments.

Table 3.35. Address Filtering Start Register bit assignments

BitsFieldDescription
[31:20]address_filtering_startAddress filtering start address
[19:1]ReservedSBZ/RAZ
[0]address_filtering_enable

0 = Address filtering disabled. This is the default.

1 = Address filtering enabled.

Note

It is recommended that you program the Address Filtering End Register before the Address Filtering Start Register to avoid unpredictable behavior between the two writes.

Address Filtering End Register

The Address Filtering End Register is a read and write register. Figure 3.13 shows the register bit assignments.

Figure 3.13. Address Filtering End Register bit assignments

Table 3.36 shows the register bit assignments.

Table 3.36. Address Filtering End Register bit assignments

BitsFieldDescription
[31:20]address_filtering_endAddress filtering end address
[19:0]ReservedSBZ/RAZ
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