2.9.12. AXI master or store buffer allocation requests

Table 2.14 shows the error signalling cases and effects when there are AXI master or write-allocate buffer allocation requests.

Table 2.14. AXI M0 and AXI M1 masters or store buffer allocation requests

CaseEffect
Tag parity or RAM error on tag read, for next victim selectionAn error is flagged through the PARRTINTR/ERRTINTR interrupt signals. The allocation is not done.
Data parity or RAM error on data read for evictionAn error is flagged through the PARRDINTR/ERRRDINTR interrupt signals. The allocation process is not stopped and the eviction does not occur in case of data RAM error.
Tag RAM error on tag writeAn error is flagged through the ERRWTINTR interrupt signal. Subsequent cache lookups to the same index are unpredictable.
Data RAM error on data writeAn error is flagged through the ERRWDINTR interrupt signal. Subsequent reads to that line are unpredictable.
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