The handshaking between the ARM PrimeCell EBI and the memory controller consists of a three-wire interface, EBIREQ, EBIGNT, and EBIBACKOFF, all active HIGH:

The EBI arbitration scheme keeps track of the memory controller that is currently granted and waits for the transaction from that memory controller to show that it has finished by driving EBIREQ LOW before it grants the next memory controller. If a higher priority memory controller requests the bus, then the signal EBIBACKOFF is issued to ask the currently granted memory controller to terminate the current transfer as soon as possible. The priorities are determined by the time out values.When two memory controllers simultaneously request the EBI, the controller with the higher priority is granted its use.The EBI as a peripheral relies on the memory controllers to release their external requests for the external bus when they are idle, because it has no other knowledge of when a transfer starts or completes.A simple handshake example is shown in Figure 1.2. Here a device requests the external bus and is immediately granted because no other devices are requesting the bus.

If a higher priority device requests the bus, when a lower priority device is in control of the external bus, then the EBIBACKOFF signal is used to inform the lower priority device to release the bus as soon as possible. An example of this is shown in Figure 1.3. The priorities are determined by the EBITIMEOUTVALUE signal, see Control and arbitration block.

Here a device has been granted the bus, but shortly after higher priority device requests the bus. The EBIBACKOFF signal is used to tell the granted device to end the access early. The higher priority device is granted the bus and completes its transfer. When complete, the lower priority device is granted the bus again and completes the interrupted transfer. The EBIREQ2 signal must be kept LOW for at least one clock cycle by the lower priority device and can then be re-asserted after this. For details of how the priority is assigned, see Control and arbitration block.