The system has a 16-bit data bus MPMCDATA[15:0]. MPMCDATAOUT[15:0] and MPMCDATAIN[15:0] are connected to bidirectional tristate pads. The direction of these pads is controlled by MPMCDATAOUTEN[7:0].

It is recommended that you use clock pads, if available, for the clock signals MPMCCLKOUT[3:0] and MPMCFBCLKIN[7:0].

The output signals, for example MPMCADDROUT[27:0], must be skew balanced with the data bus. This can be performed by selecting appropriate pad cells. One possible way is to use the same bidirectional pads for the output signals as used for the data signals.

The input signals do not have to be skew balanced and so an appropriate input pad must be chosen.

This system requires the use of the TIC for ARM production test. The TIC requires a 32-bit data bus, MPMCDATA[31:0], and three control signals:

MPMCTESTREQA is multiplexed with the nMPMCSTWEOUT signal. The MPMCTESTREQB, MPMCTESTACK, and upper 16 bits of the data bus, MPMCDATA[31:16], are signals that are required in test mode. To minimize the number of pads used these signals can be multiplexed with other signals.