The Dual-Timer module block diagram is shown in Figure 2.1.
In Figure 2.1, test logic is not shown for clarity.
Figure 2.1. Dual-Timer module block diagram
The Dual-Timer module is described in the following sections:
AMBA APB Interface
Free-running counter blocks
Interface reset
Clock signals and clock enables
Prescaler operation
Timer operation
Interrupt behavior
Programming the timer interval
Identification Registers.