ARM Dual-Timer Module (SP804) Technical Reference Manual 3.1. Summary of registers

3.1. Summary of registers

A summary of the registers is provided in Table 3.1.

Table 3.1. Summary of registers

Address	Type	Width	Reset value	Name	Description
Base+`0x00`	Read/write	32	`0x00000000`	Timer1Load	See Load Register, TimerXLoad
Base+`0x04`	Read	32	`0xFFFFFFFF`	Timer1Value	See Current Value Register, TimerXValue
Base+`0x08`	Read/write	8	`0x20`	Timer1Control	See Control Register, TimerXControl
Base+`0x0C`	Write	-	-	Timer1IntClr	See Interrupt Clear Register. TimerXIntClr
Base+`0x10`	Read	1	`0x0`	Timer1RIS	See Raw Interrupt Status Register, TimerXRIS
Base+`0x14`	Read	1	`0x0`	Timer1MIS	See Masked Interrupt Status Register, TimerXMIS
Base+`0x18`	Read/write	32	`0x00000000`	Timer1BGLoad	See Background Load Register, TimerXBGLoad
Base+`0x20`	Read/write	32	`0x00000000`	Timer2Load	See Load Register, TimerXLoad
Base+`0x24`	Read	32	`0xFFFFFFFF`	Timer2Value	See Current Value Register, TimerXValue
Base+`0x28`	Read/write	8	`0x20`	Timer2Control	See Control Register, TimerXControl
Base+`0x2C`	Write	-	-	Timer2IntClr	See Interrupt Clear Register. TimerXIntClr
Base+`0x30`	Read	1	`0x0`	Timer2RIS	See Raw Interrupt Status Register, TimerXRIS
Base+`0x34`	Read	1	`0x0`	Timer2MIS	See Masked Interrupt Status Register, TimerXMIS
Base+`0x38`	Read/write	32	`0x00000000`	Timer2BGLoad	See Background Load Register, TimerXBGLoad
`0x40`-`0xEFC`	-	-	-	-	Reserved for future expansion
Base+`0xF00`	Read/write	1	`0x0`	TimerITCR	See Integration Test Control Register, TimerITCR
Base+`0xF04`	Write	2	`0x0`	TimerITOP	See Integration Test Control Register, TimerITCR
`0xF08`-`0xFDC`	-	-	-	-	Reserved for future expansion
Base+`0xFE0`	Read-only	8	`0x04`	TimerPeriphID0	See Timer Peripheral ID0 Register, TimerPeriphID0
Base+`0xFE4`	Read-only	8	`0x18`	TimerPeriphID1	See Timer Peripheral ID1 Register, TimerPeriphID1
Base+`0xFE8`	Read-only	8	`0x14`	TimerPeriphID2	See Timer Peripheral ID2 Register, TimerPeriphID2
Base+`0xFEC`	Read-only	8	`0x00`	TimerPeriphID3	See Timer Peripheral ID3 Register, TimerPeriphID3
Base+`0xFF0`	Read-only	8	`0x0D`	TimerPCellID0	See PrimeCell ID0 Register, TimerPCellID0
Base+`0xFF4`	Read-only	8	`0xF0`	TimerPCellID1	See PrimeCell ID1 Register, TimerPCellID1
Base+`0xFF8`	Read-only	8	`0x05`	TimerPCellID2	See PrimeCell ID2 Register, TimerPCellID2
Base+`0xFFC`	Read-only	8	`0xB1`	TimerPCellID3	See PrimeCell ID3 Register, TimerPCellID3

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