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| Home > Programmer’s Model > Register descriptions > PrimeCell Identification Registers, VICPCELLID0-3 |
The VICPCELLID0-3 Registers are four 8-bit registers, that
span address locations 0xFF0-0xFFC. The read-only
register can conceptually be treated as a single 32-bit register.
The register is used as a standard cross-peripheral identification
system. Figure 3.2 shows
the bit assignment for the VICPCELLID0-3 Registers.
The four 8-bit registers are described in the following subsections:
The VICPCELLID0 Register is hard-coded and the fields within the register determine the reset value. Table 3.19 shows the bit assignment of the VICPCELLID0 Register.
The VICPCELLID1 Register is hard-coded and the fields within the register determine the reset value. Table 3.20 shows the bit assignment of the VICPCELLID1 Register.
The VICPCELLID2 Register is hard-coded and the fields within the register determine the reset value. Table 3.21 shows the bit assignment of the VICPCELLID2 Register.
The VICPCELLID3 Register is hard-coded and the fields within the register determine the reset value. Table 3.22 shows the bit assignment of the VICPCELLID3 Register.