| Copyright © 2002 ARM Limited. All rights reserved. | ARM DDI 0273A |
| Non-Confidential | |
 PDF version | |
| Home > Programmer’s Model for Test > PrimeCell VIC test harness overview |
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| Home > Programmer’s Model for Test > PrimeCell VIC test harness overview |
The additional logic for functional verification and production testing allows:
capture of input signals to the block
stimulation of the output signals.
The integration vectors provide a way of verifying that the PrimeCell VIC is correctly wired into a system. This is done by separately testing two groups of signals:
These are tested by checking the connections of all the address and data bits.
The tests for these signals are system-specific, and enable you to write the necessary tests. Additional logic is implemented allowing you to read and write to each intra-chip input/output signal.
These test features are controlled by test registers. This allows you to test the PrimeCell VIC in isolation from the rest of the system using only transfers from the AMBA AHB.
Off-chip test vectors are supplied using a 32-bit parallel External Bus Interface (EBI) and converted to internal AMBA bus transfers. The application of test vectors is controlled through the Test Interface Controller (TIC) AMBA bus master module.
| Copyright © 2002 ARM Limited. All rights reserved. | ARM DDI 0273A |
| Non-Confidential | |
| PDF version | |
| Home > Programmer’s Model for Test > PrimeCell VIC test harness overview |