| Copyright © 2002, 2003, 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0274H |
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| Home > Exception Handling > Division by Zero exception > Exception disabled |
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Clearing the DZE bit to 0 disables Division by Zero exceptions. A correctly signed infinity is written to the destination register, and the DZC flag, FPSCR[1], is set to 1.
| Copyright © 2002, 2003, 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0274H |
| Non-Confidential | |
| PDF version | |
| Home > Exception Handling > Division by Zero exception > Exception disabled |