MultiPort Memory Controller (GX176) Technical Reference Manual 2.11. Memory bank select

2.11. Memory bank select

Eight independently-configurable memory chip selects are supported, with a separate AMBA AHB select, HSELMPMCxCS[7:0], to select the appropriate chip select:

HSELMPMCxCS selects 0-3 are used to select static memory devices
HSELMPMCxCS selects 4-7 are used to select dynamic memory devices.

The MBX Interface port only requires access to dynamic memory devices using input signals GSELCS[7:4].

Table 2.13 shows the relationship between the AHB select, HSELMPMCxCS[7:0], and the memory chip selects. In the table an x refers to the AHB port number.

Table 2.13. Memory bank selection

AHB select	Chip select	Memory device	Memory chip select
HSELMPMCxCS[0]	0	Static Mem 0	nMPMCSTCSOUT[0]
HSELMPMCxCS[1]	1	Static Mem 1	nMPMCSTCSOUT[1]
HSELMPMCxCS[2]	2	Static Mem 2	nMPMCSTCSOUT[2]
HSELMPMCxCS[3]	3	Static Mem 3	nMPMCSTCSOUT[3]
HSELMPMCxCS[4]	4	Dynamic Mem 0	nMPMCDYCSOUT[0]
HSELMPMCxCS[5]	5	Dynamic Mem 1	nMPMCDYCSOUT[1]
HSELMPMCxCS[6]	6	Dynamic Mem 2	nMPMCDYCSOUT[2]
HSELMPMCxCS[7]	7	Dynamic Mem 3	nMPMCDYCSOUT[3]

The amount of memory allocated to a chip select is determined by the system AHB decoder. A further select line, HSELMPMCxG, is provided at each AHB slave port to select the MPMC slave. The largest amount of memory that can be allocated to a single chip select is 256Mb.

Note

Chip selects connected to Micron SyncFlash or V-SyncFlash must have HADDR[28:27] available for use as the software control for generating Hardware Command Sequences (HCS). If HCSs are used, the AHB decoder can only use HADDR[31:29] for decoding the chip select. If HCSs are not used, the chip select must be located at an address where HADDR[28] is zero.

Copyright © 2003 ARM Limited. All rights reserved.	ARM DDI 0278B
Non-Confidential
PDF version