2.3.6. Register 9: Cache Lockdown

Cache lockdown is controlled by the Cache Lockdown Register, r9. It is implemented as two lockdown subregisters, one for data and one for instructions.

If a cache lookup misses and a cache linefill is required, there are eight possible locations where the new line can be placed. Lockdown format C restricts the cache replacement algorithm to only use a subset of the eight possible locations. The choice of an eight-way associativity for the cache controller increases the hit rate and increases the effectiveness of Lockdown Format C. With Lockdown Format C, a block of the cache controller can be used as a form of frame buffer.

If all ways are locked, a linefill is performed on a cache miss, reading eight words from external memory, but the cache is not updated with the linefill data. In the same way, Write-Through write allocate and Write-Back write allocate accesses are treated as normal Write-Through and Write-Back accesses respectively.

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