2.6.2. Write-allocate buffer

Allocation to the cache in case of write-allocate transaction is not performed directly by the write buffer. In cases of a write miss, when a write buffer slot is drained the data, address, and byte-valid information is sent to the write allocate buffer. Write allocate behavior is deduced from the L2 memory attributes of a transaction and from the write allocate override bit in the Auxiliary Control Register. See Auxiliary Control Register.

Based on byte-valid information, the write allocate buffer requests, through the M1 port to L3, the data required to fill its data line if not full:

Data from the write buffer and M1 master port are then merged in the write-allocate buffer that can then request an allocation to the cache.

If M1 receives an ERROR response during a read transfer for the write-allocate buffer, the allocation from the write-allocate buffer to the cache is not performed.

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