2.3.2. Cache Type Register

This read-only register returns the 32-bit Cache Type, which makes the cache parameters a product of cache controller cache way size and the cache controller associativity. Figure 2.2 shows the format of the Cache Type Register.

Figure 2.2. Cache Type Register

Table 2.5 shows the encoding of the Cache Type Register.

Table 2.5. Cache Type Register

BitsFieldSubfieldComments
[31:29]Should be Zero (SBZ)-0b00
[28:25]Cache type-0b1110, Lockdown format C
[24}H-0b0, unified
[23:12]DCache size--
 [23:20][1]Way sizeRead from Auxiliary Control Register bits [19:17]
 [19:15][2]AssociativityRead from Auxiliary Control Register bits [16:13]
 [14]SBZ-
 [13:12]Line length0b00-32 bytes
[11:0]ICache size--
 [11:8][3]Way sizeRead from Auxiliary Control Register bits [19:17]
 [7:3][4]AssociativityRead from Auxiliary Control Register bits [16:13]
 [2]SBZ-
 [1:0]Line lengthb00-32 bytes

[1] The first bit is always 0.

[2] The first bit is always 0.

[3] The first bit is always 0.

[4] The first bit is always 0.

Sizes and associativity gives more information on cache size and associativity.

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