| b00000 | N/A | Counter Disabled |
| b00001 | BWABT | Buffered write abort |
| b00010 | CO | L210 half-line eviction, two events for one
full-line eviction |
| b00011 | DRHIT | Data read hit |
| b00100 | DRREQ | Data read request |
| b00101 | DWHIT | Data write hit |
| b00110 | DWREQ | Data write request (not Write-Through) |
| b00111 | DWTREQ | Data write request (Write-Through) |
| b01000 | ERRRD | Error on L210 cache data RAM read |
| b01001 | ERRRT | Error on L210 cache tag RAM read |
| b01010 | ERRWD | Error on L210 cache data RAM write |
| b01011 | ERRWT | Error on L210 cache tag RAM write |
| b01100 | IRHIT | Instruction read hit |
| b01101 | IRREQ | Instruction read request |
| b01110 | PARRD | Parity error on L210 cache data RAM read |
| b01111 | PARRT | Parity error on L210 cache tag RAM read |
| b10000 | WA | Write allocate (L210 cache allocation caused
to write transaction) |
| b10001 | ERRRD ERRRT ERRWD ERRWT | Any RAM error (OR of ERRRD) |
| b10010 | PARRD PARRT Any parity error (OR of PARRD | PARRT |
| b10011 | N/a | EMC3 overflow |
| b10100 | N/a | EMC2 overflow |
| b10110 | N/a | EMC0 overflow |
| b10111 | N/a | CLK cycle
(counter incremented on every CLK cycle) |
| b11000 -b11111 | N/a | Counter disabled |
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