A.1. Pad signals by function

Table A.1 lists the pad signals and the signal characteristics:

Note

BGA pads not listed are ground. See Figure B.1 for more information on pin numbering and layout.

Table A.1. Pad signals

FunctionSignalDescriptionTypeDriveBGA
AHB M1HADDRM1[0]Address busT8AK31
AHB M1HADDRM1[1]Address busT8AK32
AHB M1HADDRM1[2]Address busT8AG30
AHB M1HADDRM1[3]Address busT8AK33
AHB M1HADDRM1[4]Address busT8AG29
AHB M1HADDRM1[5]Address busT8AK34
AHB M1HADDRM1[6]Address busT8AE28
AHB M1HADDRM1[7]Address busT8AJ31
AHB M1HADDRM1[8]Address busT8AJ32
AHB M1HADDRM1[9]Address busT8AJ33
AHB M1HADDRM1[10]Address busT8AF30
AHB M1HADDRM1[11]Address busT8AH31
AHB M1HADDRM1[12]Address busT8AE30
AHB M1HADDRM1[13]Address busT8AH32
AHB M1HADDRM1[14]Address busT8AF29
AHB M1HADDRM1[15]Address busT8AH33
AHB M1HADDRM1[16]Address busT8AH34
AHB M1HADDRM1[17]Address busT8AG31
AHB M1HADDRM1[18]Address busT8AE29
AHB M1HADDRM1[19]Address busT8AG32
AHB M1HADDRM1[20]Address busT8AD29
AHB M1HADDRM1[21]Address busT8AG33
AHB M1HADDRM1[22]Address busT8AD30
AHB M1HADDRM1[23]Address busT8AG34
AHB M1HADDRM1[24]Address busT8AF31
AHB M1HADDRM1[25]Address busT8AF32
AHB M1HADDRM1[26]Address busT8AD28
AHB M1HADDRM1[27]Address busT8AF33
AHB M1HADDRM1[28]Address busT8AC28
AHB M1HADDRM1[29]Address busT8AF34
AHB M1HADDRM1[30]Address busT8AC29
AHB M1HADDRM1[31]Address busT8AE33
AHB M1HBURSTM1[0]Transfer burst lengthT8AD33
AHB M1HBURSTM1[1]Transfer burst lengthT8AB29
AHB M1HBURSTM1[2]Transfer burst lengthT8AD34
AHB M1HBUSREQM1Master bus requestO8AL32
AHB M1HDATAM1[0]Data busB8AB32
AHB M1HDATAM1[1]Data busB8AB33
AHB M1HDATAM1[2]Data busB8AB34
AHB M1HDATAM1[3]Data busB8Y28
AHB M1HDATAM1[4]Data busB8AA31
AHB M1HDATAM1[5]Data busB8Y29
AHB M1HDATAM1[6]Data busB8AA32
AHB M1HDATAM1[7]Data busB8Y30
AHB M1HDATAM1[8]Data busB8AA33
AHB M1HDATAM1[9]Data busB8AA30
AHB M1HDATAM1[10]Data busB8Y31
AHB M1HDATAM1[11]Data busB8Y32
AHB M1HDATAM1[12]Data busB8Y33
AHB M1HDATAM1[13]Data busB8W28
AHB M1HDATAM1[14]Data busB8Y34
AHB M1HDATAM1[15]Data busB8W29
AHB M1HDATAM1[16]Data busB8W32
AHB M1HDATAM1[17]Data busB8W33
AHB M1HDATAM1[18]Data busB8W34
AHB M1HDATAM1[19]Data busB8V29
AHB M1HDATAM1[20]Data busB8V31
AHB M1HDATAM1[21]Data busB8W30
AHB M1HDATAM1[22]Data busB8V33
AHB M1HDATAM1[23]Data busB8V28
AHB M1HDATAM1[24]Data busB8U33
AHB M1HDATAM1[25]Data busB8V30
AHB M1HDATAM1[26]Data busB8U32
AHB M1HDATAM1[27]Data busB8U28
AHB M1HDATAM1[28]Data busB8U31
AHB M1HDATAM1[29]Data busB8T34
AHB M1HDATAM1[30]Data busB8T33
AHB M1HDATAM1[31]Data busB8U29
AHB M1HGRANTM1Arbiter bus grantI-AJ30
AHB M1HLOCKM1Locked sequenceO8AF28
AHB M1HPROTM1[0]Protection ControlT8AC31
AHB M1HPROTM1[1]Protection ControlT8AC32
AHB M1HPROTM1[2]Protection ControlT8AA28
AHB M1HPROTM1[3]Protection ControlT8AC33
AHB M1HREADYM1Transfer finishedI-AA29
AHB M1HRESPM1[0]Transfer responseI-AC34
AHB M1HRESPM1[1]Transfer responseI-AB30
AHB M1HSIZEM1[0]Transfer sizeT8AD32
AHB M1HSIZEM1[1]Transfer sizeT8AC30
AHB M1HTRANSM1[0]Transfer typeT8AD31
AHB M1HTRANSM1[1]Transfer typeT8AB28
AHB M1HWRITEM1Write transferT8AE34
AHB M2HADDRM2[0]Address busT8N32
AHB M2HADDRM2[1]Address busT8M34
AHB M2HADDRM2[2]Address busT8M33
AHB M2HADDRM2[3]Address busT8R28
AHB M2HADDRM2[4]Address busT8M32
AHB M2HADDRM2[5]Address busT8P30
AHB M2HADDRM2[6]Address busT8M31
AHB M2HADDRM2[7]Address busT8P29
AHB M2HADDRM2[8]Address busT8L34
AHB M2HADDRM2[9]Address busT8L33
AHB M2HADDRM2[10]Address busT8L32
AHB M2HADDRM2[11]Address busT8P28
AHB M2HADDRM2[12]Address busT8L31
AHB M2HADDRM2[13]Address busT8N30
AHB M2HADDRM2[14]Address busT8K34
AHB M2HADDRM2[15]Address busT8N29
AHB M2HADDRM2[16]Address busT8K32
AHB M2HADDRM2[17]Address busT8N28
AHB M2HADDRM2[18]Address busT8J34
AHB M2HADDRM2[19]Address busT8J33
AHB M2HADDRM2[20]Address busT8J32
AHB M2HADDRM2[21]Address busT8M30
AHB M2HADDRM2[22]Address busT8J31
AHB M2HADDRM2[23]Address busT8M28
AHB M2HADDRM2[24]Address busT8H34
AHB M2HADDRM2[25]Address busT8H33
AHB M2HADDRM2[26]Address busT8H32
AHB M2HADDRM2[27]Address busT8M29
AHB M2HADDRM2[28]Address busT8H31
AHB M2HADDRM2[29]Address busT8L30
AHB M2HADDRM2[30]Address busT8G34
AHB M2HADDRM2[31]Address busT8L28
AHB M2HBURSTM2[0]Transfer burst lengthT8L29
AHB M2HBURSTM2[1]Transfer burst lengthT8F33
AHB M2HBURSTM2[2]Transfer burst lengthT8K29
AHB M2HBUSREQM2Master bus requestO8T28
AHB M2HDATAM2[0]Data busB8J28
AHB M2HDATAM2[1]Data busB8E34
AHB M2HDATAM2[2]Data busB8E33
AHB M2HDATAM2[3]Data busB8E32
AHB M2HDATAM2[4]Data busB8J29
AHB M2HDATAM2[5]Data busB8E31
AHB M2HDATAM2[6]Data busB8H30
AHB M2HDATAM2[7]Data busB8D32
AHB M2HDATAM2[8]Data busB8H29
AHB M2HDATAM2[9]Data busB8F28
AHB M2HDATAM2[10]Data busB8C31
AHB M2HDATAM2[11]Data busB8D30
AHB M2HDATAM2[12]Data busB8G28
AHB M2HDATAM2[13]Data busB8F27
AHB M2HDATAM2[14]Data busB8F29
AHB M2HDATAM2[15]Data busB8G27
AHB M2HDATAM2[16]Data busB8C30
AHB M2HDATAM2[17]Data busB8E27
AHB M2HDATAM2[18]Data busB8B30
AHB M2HDATAM2[19]Data busB8A30
AHB M2HDATAM2[20]Data busB8E29
AHB M2HDATAM2[21]Data busB8F26
AHB M2HDATAM2[22]Data busB8D29
AHB M2HDATAM2[23]Data busB8E26
AHB M2HDATAM2[24]Data busB8C29
AHB M2HDATAM2[25]Data busB8G26
AHB M2HDATAM2[26]Data busB8B29
AHB M2HDATAM2[27]Data busB8A29
AHB M2HDATAM2[28]Data busB8E28
AHB M2HDATAM2[29]Data busB8G25
AHB M2HDATAM2[30]Data busB8D28
AHB M2HDATAM2[31]Data busB8E25
AHB M2HGRANTM2Arbiter bus grantI-R29
AHB M2HLOCKM2Locked sequenceO8N33
AHB M2HPROTM2[0]Protection ControlT8F32
AHB M2HPROTM2[1]Protection ControlT8F31
AHB M2HPROTM2[2]Protection ControlT8F30
AHB M2HPROTM2[3]Protection ControlT8K28
AHB M2HREADYM2Transfer finishedI-G29
AHB M2HRESPM2[0]Transfer responseI-J30
AHB M2HRESPM2[1]Transfer responseI-H28
AHB M2HSIZEM2[0]Transfer sizeT8K30
AHB M2HSIZEM2[1]Transfer sizeT8F34
AHB M2HTRANSM2[0]Transfer typeT8G32
AHB M2HTRANSM2[1]Transfer typeT8G31
AHB M2HWRITEM2Write transferT8G33
AHB SHADDRS[0]Address busI-D7
AHB SHADDRS[1]Address busI-F10
AHB SHADDRS[2]Address busI-A6
AHB SHADDRS[3]Address busI-G10
AHB SHADDRS[4]Address busI-B6
AHB SHADDRS[5]Address busI-E9
AHB SHADDRS[6]Address busI-C6
AHB SHADDRS[7]Address busI-F9
AHB SHADDRS[8]Address busI-D6
AHB SHADDRS[9]Address busI-G9
AHB SHADDRS[10]Address busI-A5
AHB SHADDRS[11]Address busI-H5
AHB SHADDRS[12]Address busI-E4
AHB SHADDRS[13]Address busI-J7
AHB SHADDRS[14]Address busI-E3
AHB SHADDRS[15]Address busI-E2
AHB SHADDRS[16]Address busI-E1
AHB SHADDRS[17]Address busI-J5
AHB SHADDRS[18]Address busI-G6
AHB SHADDRS[19]Address busI-J6
AHB SHADDRS[20]Address busI-F5
AHB SHADDRS[21]Address busI-K7
AHB SHADDRS[22]Address busI-F4
AHB SHADDRS[23]Address busI-K6
AHB SHADDRS[24]Address busI-F3
AHB SHADDRS[25]Address busI-K5
AHB SHADDRS[26]Address busI-F1
AHB SHADDRS[27]Address busI-L7
AHB SHADDRS[28]Address busI-G5
AHB SHADDRS[29]Address busI-L6
AHB SHADDRS[30]Address busI-G4
AHB SHADDRS[31]Address busI-G3
AHB SHBURSTS[0]Transfer burst lengthI-M6
AHB SHBURSTS[1]Transfer burst lengthI-H3
AHB SHBURSTS[2]Transfer burst lengthI-M5
AHB SHDATAS[0]Data busB8B13
AHB SHDATAS[1]Data busB8F15
AHB SHDATAS[2]Data busB8C13
AHB SHDATAS[3]Data busB8G15
AHB SHDATAS[4]Data busB8A12
AHB SHDATAS[5]Data busB8F14
AHB SHDATAS[6]Data busB8B12
AHB SHDATAS[7]Data busB8C12
AHB SHDATAS[8]Data busB8D12
AHB SHDATAS[9]Data busB8E13
AHB SHDATAS[10]Data busB8B11
AHB SHDATAS[11]Data busB8G14
AHB SHDATAS[12]Data busB8C11
AHB SHDATAS[13]Data busB8F13
AHB SHDATAS[14]Data busB8D11
AHB SHDATAS[15]Data busB8A10
AHB SHDATAS[16]Data busB8B10
AHB SHDATAS[17]Data busB8G13
AHB SHDATAS[18]Data busB8C10
AHB SHDATAS[19]Data busB8G12
AHB SHDATAS[20]Data busB8A9
AHB SHDATAS[21]Data busB8E12
AHB SHDATAS[22]Data busB8B9
AHB SHDATAS[23]Data busB8F12
AHB SHDATAS[24]Data busB8C9
AHB SHDATAS[25]Data busB8D9
AHB SHDATAS[26]Data busB8A8
AHB SHDATAS[27]Data busB8E11
AHB SHDATAS[28]Data busB8B8
AHB SHDATAS[29]Data busB8G11
AHB SHDATAS[30]Data busB8D8
AHB SHDATAS[31]Data busB8F11
AHB SHMASTLOCKSLocked sequenceI-J3
AHB SHPROTS[0]Protection ControlI-H2
AHB SHPROTS[1]Protection ControlI-N7
AHB SHPROTS[2]Protection ControlI-H1
AHB SHPROTS[3]Protection ControlI-N6
AHB SHREADYSTransfer finishedB8E10
AHB SHRESPS[0]Transfer responseT8B7
AHB SHRESPS[1]Transfer responseT8C7
AHB SHSELSSlave selectI-N5
AHB SHSIZES[0]Transfer sizeI-L5
AHB SHSIZES[1]Transfer sizeI-H4
AHB SHTRANSS[0]Transfer typeI-M7
AHB SHTRANSS[1]Transfer typeI-G1
AHB SHWRITESWrite transferI-G2
AHB MonitorAHBMONITOR[0]Debug informationO8F25
AHB MonitorAHBMONITOR[1]Debug informationO8B28
AHB MonitorAHBMONITOR[2]Debug informationO8G24
AHB MonitorAHBMONITOR[3]Debug informationO8D27
AHB MonitorAHBMONITOR[4]Debug informationO8F24
AHB MonitorAHBMONITOR[5]Debug informationO8C27
AHB MonitorAHBMONITOR[6]Debug informationO8B27
AHB MonitorAHBMONITOR[7]Debug informationO8A27
AHB MonitorAHBMONITOR[8]Debug informationO8E24
AHB MonitorAHBMONITOR[9]Debug informationO8D26
AHB MonitorAHBMONITOR[10]Debug informationO8G23
AHB MonitorAHBMONITOR[11]Debug informationO8C26
AHB MonitorAHBMONITOR[12]Debug informationO8E23
AHB MonitorAHBMONITOR[13]Debug informationO8B26
AHB MonitorAHBMONITOR[14]Debug informationO8F23
AHB MonitorAHBMONITOR[15]Debug informationO8A26
AHB MonitorAHBMONITOR[16]Debug informationO8C25
AHB MonitorAHBMONITOR[17]Debug informationO8B25
AHB MonitorAHBMONITOR[18]Debug informationO8G22
AHB MonitorAHBMONITOR[19]Debug informationO8A25
AHB MonitorAHBMONITOR[20]Debug informationO8F22
AHB MonitorAHBMONITOR[21]Debug informationO8C24
AHB MonitorAHBMONITOR[22]Debug informationO8E22
AHB MonitorAHBMONITOR[23]Debug informationO8B24
AHB MonitorAHBMONITOR[24]Debug informationO8G21
AHB MonitorAHBMONITOR[25]Debug informationO8A24
AHB MonitorAHBMONITOR[26]Debug informationO8F21
AHB MonitorAHBMONITOR[27]Debug informationO8D23
AHB MonitorAHBMONITOR[28]Debug informationO8C23
AHB MonitorAHBMONITOR[29]Debug informationO8B23
AHB MonitorAHBMONITOR[30]Debug informationO8G20
AHB MonitorAHBMONITOR[31]Debug informationO8A23
AHB MonitorAHBMONITOR[32]Debug informationO8E21
AHB MonitorAHBMONITOR[33]Debug informationO8B22
CLCDCCLACAC bias drive/data enableO4AN23
CLCDCCLCDCLKEXTExternal Clock input for CLCDI-AN22
CLCDCCLCPPanel clockO4AP23
CLCDCCLD[0]Data busO4AH20
CLCDCCLD[1]Data busO4AM23
CLCDCCLD[2]Data busO4AL23
CLCDCCLD[3]Data busO4AP24
CLCDCCLD[4]Data busO4AK21
CLCDCCLD[5]Data busO4AN24
CLCDCCLD[6]Data busO4AK22
CLCDCCLD[7]Data busO4AL24
CLCDCCLD[8]Data busO4AJ21
CLCDCCLD[9]Data busO4AP25
CLCDCCLD[10]Data busO4AH21
CLCDCCLD[11]Data busO4AN25
CLCDCCLD[12]Data busO4AJ22
CLCDCCLD[13]Data busO4AM25
CLCDCCLD[14]Data busO4AK23
CLCDCCLD[15]Data busO4AP26
CLCDCCLD[16]Data busO4AH22
CLCDCCLD[17]Data busO4AN26
CLCDCCLD[18]Data busO4AM26
CLCDCCLD[19]Data busO4AL26
CLCDCCLD[20]Data busO4AJ23
CLCDCCLD[21]Data busO4AP27
CLCDCCLD[22]Data busO4AH23
CLCDCCLD[23]Data busO4AN27
CLCDCCLFPFrame synch pulseO4AJ20
CLCDCCLLELine endO4AK24
CLCDCCLLPLine synch pulseO4AK20
CLCDCCLPOWERPanel power enableO4AM22
ClockHCLKM1Asynchronous AHB Clock InI-T32
ClockHCLKM2Asynchronous AHB Clock InI-C28
ClockHCLKSAsynchronous AHB Clock InI-A7
ClocknPLLRESETPLL resetI-H7
ClockPLLCLKEXTClock input from a PLLI-F8
ClockPLLPWRDNPLL power downI-D3
ClockREFCLK32K32KHz Reference ClockI-C5
ClockTIMCLKEXTTimer ClockI-F20
ClockXTALCLKEXTClock input from a crystal oscillatorI-B5
CPUDBGACKDebug acknowledgeO4E17
CPUEDBGRQExternal Debug requestI-C19
DMACDMACBREQ[0]Burst Transfer RequestI-L2
DMACDMACBREQ[1]Burst Transfer RequestI-R5
DMACDMACBREQ[2]Burst Transfer RequestI-L1
DMACDMACBREQ[3]Burst Transfer RequestI-T6
DMACDMACBREQ[4]Burst Transfer RequestI-M4
DMACDMACBREQ[5]Burst Transfer RequestI-T7
DMACDMACCLR[0]Request Acknowledge ClearO4J2
DMACDMACCLR[1]Request Acknowledge ClearO4J1
DMACDMACCLR[2]Request Acknowledge ClearO4K3
DMACDMACCLR[3]Request Acknowledge ClearO4P7
DMACDMACCLR[4]Request Acknowledge ClearO4K2
DMACDMACCLR[5]Request Acknowledge ClearO4P5
DMACDMACLBREQ[0]Last Burst Transfer RequestI-N1
DMACDMACLBREQ[1]Last Burst Transfer RequestI-U5
DMACDMACLBREQ[2]Last Burst Transfer RequestI-P4
DMACDMACLBREQ[3]Last Burst Transfer RequestI-U7
DMACDMACLBREQ[4]Last Burst Transfer RequestI-P3
DMACDMACLBREQ[5]Last Burst Transfer RequestI-V5
DMACDMACLSREQ[0]Last Single Transfer RequestI-P2
DMACDMACLSREQ[1]Last Single Transfer RequestI-V6
DMACDMACLSREQ[2]Last Single Transfer RequestI-P1
DMACDMACLSREQ[3]Last Single Transfer RequestI-V7
DMACDMACLSREQ[4]Last Single Transfer RequestI-R4
DMACDMACLSREQ[5]Last Single Transfer RequestI-R3
DMACDMACSREQ[0]Single Transfer RequestI-M3
DMACDMACSREQ[1]Single Transfer RequestI-M2
DMACDMACSREQ[2]Single Transfer RequestI-M1
DMACDMACSREQ[3]Single Transfer RequestI-T5
DMACDMACSREQ[4]Single Transfer RequestI-N3
DMACDMACSREQ[5]Single Transfer RequestI-U6
DMACDMACTC[0]Terminal CountO4K1
DMACDMACTC[1]Terminal CountO4P6
DMACDMACTC[2]Terminal CountO4L4
DMACDMACTC[3]Terminal CountO4R7
DMACDMACTC[4]Terminal CountO4L3
DMACDMACTC[5]Terminal CountO4R6
ETMETMEXTINDebug cross trigger supportI-E14
ETMETMEXTOUT[0]Debug cross trigger supportO12A14
ETMETMEXTOUT[1]Debug cross trigger supportO12B14
ETMETMEXTOUT[2]Debug cross trigger supportO12D14
ETMETMEXTOUT[3]Debug cross trigger supportO12A13
ETMPIPESTAT[0]Pipeline StatusO12C18
ETMPIPESTAT[1]Pipeline StatusO12F17
ETMPIPESTAT[2]Pipeline StatusO12B18
ETMTRACECLKTrace ClockO12A19
ETMTRACEPKT[0]Trace PacketO12G17
ETMTRACEPKT[1]Trace PacketO12A17
ETMTRACEPKT[2]Trace PacketO12B17
ETMTRACEPKT[3]Trace PacketO12D17
ETMTRACEPKT[4]Trace PacketO12F16ETM
ETMTRACEPKT[6]Trace PacketO12A16
ETMTRACEPKT[7]Trace PacketO12B16
ETMTRACEPKT[8]Trace PacketO12E16
ETMTRACEPKT[9]Trace PacketO12C16
ETMTRACEPKT[10]Trace PacketO12A15
ETMTRACEPKT[11]Trace PacketO12B15
ETMTRACEPKT[12]Trace PacketO12G16
ETMTRACEPKT[13]Trace PacketO12C15
ETMTRACEPKT[14]Trace PacketO12E15
ETMTRACEPKT[15]Trace PacketO12D15
ETMTRACESYNCTrace SyncO12D18
GPIO 0GP0[0]General Purpose I/OB8AF6
GPIO 0GP0[1]General Purpose I/OB8AJ5
GPIO 0GP0[2]General Purpose I/OB8AF7
GPIO 0GP0[3]General Purpose I/OB8AH6
GPIO 0GP0[4]General Purpose I/OB8AK1
GPIO 0GP0[5]General Purpose I/OB8AK2
GPIO 0GP0[6]General Purpose I/OB8AG5
GPIO 0GP0[7]General Purpose I/OB8AK3
GPIO 1GP1[0]General Purpose I/OB4AG6
GPIO 1GP1[1]General Purpose I/OB4AK4
GPIO 1GP1[2]General Purpose I/OB4AG7
GPIO 1GP1[3]General Purpose I/OB4AJ6
GPIO 1GP1[4]General Purpose I/OB4AH7
GPIO 1GP1[5]General Purpose I/OB4AH8
GPIO 1GP1[6]General Purpose I/OB4AL3
GPIO 1GP1[7]General Purpose I/OB4AJ7
GPIO 2GP2[0]General Purpose I/OB4AM4
GPIO 2GP2[1]General Purpose I/OB4AJ8
GPIO 2GP2[2]General Purpose I/OB4AL5
GPIO 2GP2[3]General Purpose I/OB4AK8
GPIO 2GP2[4]General Purpose I/OB4AM5
GPIO 2GP2[5]General Purpose I/OB4AH9
GPIO 2GP2[6]General Purpose I/OB4AN5
GPIO 2GP2[7]General Purpose I/OB4AP5
GPIO 3GP3[0]General Purpose I/OB4AK6
GPIO 3GP3[1]General Purpose I/OB4AJ9
GPIO 3GP3[2]General Purpose I/OB4AL6
GPIO 3GP3[3]General Purpose I/OB4AK9
GPIO 3GP3[4]General Purpose I/OB4AM6
GPIO 3GP3[5]General Purpose I/OB4AH10
GPIO 3GP3[6]General Purpose I/OB4AN6
GPIO 3GP3[7]General Purpose I/OB4AJ10
JTAGnBSTAPENBoundary Scan TAP SelectIPU-C21
JTAGnTRSTTest ResetIPU-D21
JTAGRTCKSync of Multi-ICE TCKO8A21
JTAGTCKTest ClockI-A22
JTAGTDIBoundary Scan InputIPU-G19
JTAGTDOBoundary Scan OutputT8B21
JTAGTMSTest Mode SelectIPU-E20
MiscellaneousBIGENDOUTByte Endian Mode or TESTACKO4G7
MiscellaneousCONFIGINITChip configurationI-E8
MiscellaneousnCONFIGCLRChip configuration resetI-E6
MiscellaneousnPORESETPower On ResetI-D5
MiscellaneousnRESETAMBA AHB ResetI-E7
MiscellaneousSCANENABLEScan EnableI-AJ4
MiscellaneousTESTSELECTManufacturing Test SelectI-H6
MPMC MPMCADDR[0]Address busO12Y3
MPMC MPMCADDR[1]Address busO12Y4
MPMC MPMCADDR[2]Address busO12AA5
MPMC MPMCADDR[3]Address busO12AA2
MPMC MPMCADDR[4]Address busO12AA3
MPMC MPMCADDR[5]Address busO12AA4
MPMC MPMCADDR[6]Address busO12AA6
MPMC MPMCADDR[7]Address busO12AB1
MPMC MPMCADDR[8]Address busO12AA7
MPMC MPMCADDR[9]Address busO12AB2
MPMC MPMCADDR[10]Address busO12AB3
MPMC MPMCADDR[11]Address busO12AC1
MPMC MPMCADDR[12]Address busO12AB5
MPMC MPMCADDR[13]Address busO12AC2
MPMC MPMCADDR[14]Address busO12AC3
MPMC MPMCCKE[0]Clock enableO8U3
MPMC MPMCCKE[1]Clock enableO8W5
MPMC MPMCCKE[2]Clock enableO8U2
MPMC MPMCCKE[3]Clock enableO8W6
MPMC MPMCCLK[0]Clock outO16R2
MPMC MPMCCLK[1]Clock outO16R1
MPMC MPMCCLK[2]Clock outO16T3
MPMC MPMCCLK[3]Clock outO16T2
MPMC MPMCCLK[4]Clock outO16T1
MPMC MPMCDATA[0]Data busB8AC4
MPMC MPMCDATA[1]Data busB8AB6
MPMC MPMCDATA[2]Data busB8AD1
MPMC MPMCDATA[3]Data busB8AB7
MPMC MPMCDATA[4]Data busB8AD2
MPMC MPMCDATA[5]Data busB8AD3
MPMC MPMCDATA[6]Data busB8AD4
MPMC MPMCDATA[7]Data busB8AC5
MPMC MPMCDATA[8]Data busB8AE2
MPMC MPMCDATA[9]Data busB8AC6
MPMC MPMCDATA[10]Data busB8AE3
MPMC MPMCDATA[11]Data busB8AF1
MPMC MPMCDATA[12]Data busB8AF2
MPMC MPMCDATA[13]Data busB8AC7
MPMC MPMCDATA[14]Data busB8AF3
MPMC MPMCDATA[15]Data busB8AD6
MPMC MPMCDATA[16]Data busB8AF4
MPMC MPMCDATA[17]Data busB8AG1
MPMC MPMCDATA[18]Data busB8AG2
MPMC MPMCDATA[19]Data busB8AD5
MPMC MPMCDATA[20]Data busB8AG3
MPMC MPMCDATA[21]Data busB8AD7
MPMC MPMCDATA[22]Data busB8AG4
MPMC MPMCDATA[23]Data busB8AH1
MPMC MPMCDATA[24]Data busB8AH2
MPMC MPMCDATA[25]Data busB8AE5
MPMC MPMCDATA[26]Data busB8AH4
MPMC MPMCDATA[27]Data busB8AE6
MPMC MPMCDATA[28]Data busB8AH5
MPMC MPMCDATA[29]Data busB8AJ1
MPMC MPMCDATA[30]Data busB8AJ2
MPMC MPMCDATA[31]Data busB8AE7
MPMC MPMCDQM[0]Data mask & byte lane selectO8V2
MPMC MPMCDQM[1]Data mask & byte lane selectO8W7
MPMC MPMCDQM[2]Data mask & byte lane selectO8V4
MPMC MPMCDQM[3]Data mask & byte lane selectO8Y5
MPMC MPMCFBCLKClock feedbackI-U4
MPMC MPMCRPVHHOUTSelect Vh level for nRPO4AF5
MPMC nMPMCCASColumn address strobeO12W2
MPMC nMPMCDYCS[0]Synch memory chip enableO8Y6
MPMC nMPMCDYCS[1]Synch memory chip enableO8Y1
MPMC nMPMCDYCS[2]Synch memory chip enableO8Y7
MPMC nMPMCDYCS[3]Synch memory chip enableO8Y2
MPMC nMPMCRASRow address strobeO12W1
MPMC nMPMCRPOUTSyncFlash reset power downO4AJ3
MPMC nMPMCWEWrite enableO12W3
PowerTAVDDPLL digital powerPIO-C4
PowerTAVSSPLL digital groundPIO-F7
PowerTVDD1PPLL analog powerPIO-G8
PowerTVSS1PPLL analog groundPIO-F6
PowerVDDC[0]Core PowerPC-F2
PowerVDDC[1]Core PowerPC-J4
PowerVDDC[2]Core PowerPC-N2
PowerVDDC[3]Core PowerPC-V3
PowerVDDC[4]Core PowerPC-AA1
PowerVDDC[5]Core PowerPC-AE1
PowerVDDC[6]Core PowerPC-AH3
PowerVDDC[7]Core PowerPC-AP6
PowerVDDC[8]Core PowerPC-AP9
PowerVDDC[9]Core PowerPC-AN12
PowerVDDC[10]Core PowerPC-AP20
PowerVDDC[11]Core PowerPC-AP21
PowerVDDC[12]Core PowerPC-AM24
PowerVDDC[13]Core PowerPC-AM27
PowerVDDC[14]Core PowerPC-AJ34
PowerVDDC[15]Core PowerPC-AE32
PowerVDDC[16]Core PowerPC-AA34
PowerVDDC[17]Core PowerPC-V32
PowerVDDC[18]Core PowerPC-R31
PowerVDDC[19]Core PowerPC-K33
PowerVDDC[20]Core PowerPC-G30
PowerVDDC[21]Core PowerPC-A28
PowerVDDC[22]Core PowerPC-D24
PowerVDDC[23]Core PowerPC-C22
PowerVDDC[24]Core PowerPC-B19
PowerVDDC[25]Core PowerPC-C14
PowerVDDC[26]Core PowerPC-A11
PowerVDDC[27]Core PowerPC-C8
PowerVDDIO[0]I/O PowerPIO-B1
PowerVDDIO[1]I/O PowerPIO-D1
PowerVDDIO[2]I/O PowerPIO-V1
PowerVDDIO[3]I/O PowerPIO-AL1
PowerVDDIO[4]I/O PowerPIO-AN1
PowerVDDIO[5]I/O PowerPIO-A2
PowerVDDIO[6]I/O PowerPIO-C2
PowerVDDIO[7]I/O PowerPIO-AM2
PowerVDDIO[8]I/O PowerPIO-AP2
PowerVDDIO[9]I/O PowerPIO-B3
PowerVDDIO[10]I/O PowerPIO-AN3
PowerVDDIO[11]I/O PowerPIO-A4
PowerVDDIO[12]I/O PowerPIO-D4
PowerVDDIO[13]I/O PowerPIO-K4
PowerVDDIO[14]I/O PowerPIO-N4
PowerVDDIO[15]I/O PowerPIO-T4
PowerVDDIO[16]I/O PowerPIO-W4
PowerVDDIO[17]I/O PowerPIO-AB4
PowerVDDIO[18]I/O PowerPIO-AE4
PowerVDDIO[19]I/O PowerPIO-AL4
PowerVDDIO[20]I/O PowerPIO-F5
PowerVDDIO[21]I/O PowerPIO-AK5
PowerVDDIO[22]I/O PowerPIO-D10
PowerVDDIO[23]I/O PowerPIO-AL10
PowerVDDIO[24]I/O PowerPIO-D13
PowerVDDIO[25]I/O PowerPIO-AL13
PowerVDDIO[26]I/O PowerPIO-D16
PowerVDDIO[27]I/O PowerPIO-AL13
PowerVDDIO[28]I/O PowerPIO-D19
PowerVDDIO[29]I/O PowerPIO-AL19
PowerVDDIO[30]I/O PowerPIO-D22
PowerVDDIO[31]I/O PowerPIO-AL22
PowerVDDIO[32]I/O PowerPIO-D25
PowerVDDIO[33]I/O PowerPIO-AL25
PowerVDDIO[34]I/O PowerPIO-E30
PowerVDDIO[35]I/O PowerPIO-AK30
PowerVDDIO[36]I/O PowerPIO-A31
PowerVDDIO[37]I/O PowerPIO-D31
PowerVDDIO[38]I/O PowerPIO-K31
PowerVDDIO[39]I/O PowerPIO-N31
PowerVDDIO[40]I/O PowerPIO-T31
PowerVDDIO[41]I/O PowerPIO-W31
PowerVDDIO[42]I/O PowerPIO-AB31
PowerVDDIO[43]I/O PowerPIO-AE31
PowerVDDIO[44]I/O PowerPIO-AL31
PowerVDDIO[45]I/O PowerPIO-AP31
PowerVDDIO[46]I/O PowerPIO-B32
PowerVDDIO[47]I/O PowerPIO-AN32
PowerVDDIO[48]I/O PowerPIO-A33
PowerVDDIO[49]I/O PowerPIO-C33
PowerVDDIO[50]I/O PowerPIO-AM33
PowerVDDIO[51]I/O PowerPIO-AP33
PowerVDDIO[52]I/O PowerPIO-B34
PowerVDDIO[53]I/O PowerPIO-D34
PowerVDDIO[54]I/O PowerPIO-U34
PowerVDDIO[55]I/O PowerPIO-AL34
PowerVDDIO[56]I/O PowerPIO-AN34
Smart CardnSCICARDRSTCard resetO4R30
Smart CardnSCICLKENTristate buffer controlO4P32
Smart CardnSCIDATAENTristate buffer controlO4T29
Smart CardnSCIDATAOUTENSerial data buffer controlO4P33
Smart CardnSCIVCCENCard supply voltage controlO4P31
Smart CardSCICLKINClock input from card interfaceI-R33
Smart CardSCICLKOUTClock output to card interfaceT4P34
Smart CardSCIDATAINSerial data inputI-U30
Smart CardSCIDATAOUTODOpen drain data outputT4T30
Smart CardSCIDETECTCard detectI-R32
Smart CardSCIFCBFunction code for type II sync cardO4N34
Smart CardSCIREFCLKEXTExternal Clock input for SCII-R34
SSMCnSMBLS[0]Byte lane selectO8AM21
SSMCnSMBLS[1]Byte lane selectO8AJ19
SSMCnSMBLS[2]Byte lane selectO8AL21
SSMCnSMBLS[3]Byte lane selectO8AH19
SSMCnSMBURSTWAITBurst wait mode inputI-AL7
SSMCnSMOENOutput enableO12AP22
SSMCnSMWENWrite enableO12AP19
SSMCnSTATICCS[0]Chip selectO8AM19
SSMCnSTATICCS[1]Chip selectO8AH18
SSMCnSTATICCS[2]Chip selectO8AN20
SSMCnSTATICCS[3]Chip selectO8AM20
SSMCnSTATICCS[4]Chip selectO8AL20
SSMCnSTATICCS[5]Chip selectO8AJ18
SSMCnSTATICCS[6]Chip selectO8AN21
SSMCnSTATICCS[7]Chip selectO8AK19
SSMCSMADDR[0]Address busO12AH15
SSMCSMADDR[1]Address busO12AM14
SSMCSMADDR[2]Address busO12AJ15
SSMCSMADDR[3]Address busO12AN14
SSMCSMADDR[4]Address busO12AP14
SSMCSMADDR[5]Address busO12AL15
SSMCSMADDR[6]Address busO12AH16
SSMCSMADDR[7]Address busO12AM15
SSMCSMADDR[8]Address busO12AK15
SSMCSMADDR[9]Address busO12AN15
SSMCSMADDR[10]Address busO12AP15
SSMCSMADDR[11]Address busO12AM16
SSMCSMADDR[12]Address busO12AJ16
SSMCSMADDR[13]Address busO12AN16
SSMCSMADDR[14]Address busO12AK17
SSMCSMADDR[15]Address busO12AP16
SSMCSMADDR[16]Address busO12AL17
SSMCSMADDR[17]Address busO12AM17
SSMCSMADDR[18]Address busO12AH17
SSMCSMADDR[19]Address busO12AN17
SSMCSMADDR[20]Address busO12AK16
SSMCSMADDR[21]Address busO12AP18
SSMCSMADDR[22]Address busO12AN18
SSMCSMADDR[23]Address busO12AL18
SSMCSMADDR[24]Address busO12AJ17
SSMCSMADDR[25]Address busO12AM18
SSMCSMADDRVALIDAddress validO8AK18
SSMCSMBAABurst address advanceO8AN19
SSMCSMCANCELWAITWait mode cancelI-AH11
SSMCSMCLK[0]Clock outO16AM7
SSMCSMCLK[1]Clock outO16AN7
SSMCSMCLK[2]Clock outO16AP7
SSMCSMDATA[0]Data busB8AK10
SSMCSMDATA[1]Data busB8AM8
SSMCSMDATA[2]Data busB8AJ11
SSMCSMDATA[3]Data busB8AN8
SSMCSMDATA[4]Data busB8AK11
SSMCSMDATA[5]Data busB8AP8
SSMCSMDATA[6]Data busB8AH12
SSMCSMDATA[7]Data busB8AL9
SSMCSMDATA[8]Data busB8AM9
SSMCSMDATA[9]Data busB8AN9
SSMCSMDATA[10]Data busB8AJ12
SSMCSMDATA[11]Data busB8AM10
SSMCSMDATA[12]Data busB8AK12
SSMCSMDATA[13]Data busB8AN10
SSMCSMDATA[14]Data busB8AH13
SSMCSMDATA[15]Data busB8AP10
SSMCSMDATA[16]Data busB8AL11
SSMCSMDATA[17]Data busB8AM11
SSMCSMDATA[18]Data busB8AK13
SSMCSMDATA[19]Data busB8AN11
SSMCSMDATA[20]Data busB8AJ13
SSMCSMDATA[21]Data busB8AP11
SSMCSMDATA[22]Data busB8AL12
SSMCSMDATA[23]Data busB8AM12
SSMCSMDATA[24]Data busB8AH14
SSMCSMDATA[25]Data busB8AP12
SSMCSMDATA[26]Data busB8AJ14
SSMCSMDATA[27]Data busB8AM13
SSMCSMDATA[28]Data busB8AK14
SSMCSMDATA[29]Data busB8AN13
SSMCSMDATA[30]Data busB8AP13
SSMCSMDATA[31]Data busB8AL14
SSMCSMFBCLKClock feedbackI-AL8
SSMCSMWAITWait mode inputI-AK7
SSPnSSPCTLOEOutput enable SSPCLKOUTO4A20
SSPnSSPOEOutput enable SSPTXDO4E18
SSPSSPCLKEXTExternal Clock input for SSPI-F19
SSPSSPCLKINClock inputI-C20
SSPSSPCLKOUTClock outputO4G18
SSPSSPFSSINFrame inputI-D20
SSPSSPFSSOUTFrame or slave selectO4F18
SSPSSPRXDReceive data inputI-E19
SSPSSPTXDTransmit data outputO4B20
UART 0nSIROUT0SIR transmitted serial dataO4AJ28
UART 0nUART0CTSClear to sendI-AH25
UART 0nUART0DCDData Carrier detectI-AK28
UART 0nUART0DSRData Set ReadyI-AJ26
UART 0nUART0DTRData terminal readyO4AK26
UART 0nUART0Out1Out 1 modem statusO4AK27
UART 0nUART0Out2Out 2 modem statusO4AL30
UART 0nUART0RIRing IndicatorI-AP30
UART 0nUART0RTSRequest to sendO4AK29
UART 0SIRIN0SIR received serial dataI-AN30
UART 0UART0RXDReceived serial dataI-AH26
UART 0UART0TXDTransmitted serial dataO4AM30
UART 0UARTCLKEXTExternal Clock input for UARTI-AL29
UART 1nUART1CTSClear to sendI-AM31
UART 1nUART1RTSRequest to sendO4AG28
UART 1UART1RXDReceived serial dataI-AJ27
UART 1UART1TXDTransmitted serial dataO4AH27
UART 2nUART2CTSClear to sendI-AH29
UART 2nUART2RTSRequest to sendO4AH30
UART 2UART2RXDReceived serial dataI-AJ29
UART 2UART2TXDTransmitted serial dataO4AH28
VICPWRFAILInterrupt sourceI-AL27
VICVICINTSOURCE[21]Interrupt sourceI-AJ24
VICVICINTSOURCE[22]Interrupt sourceI-AP28
VICVICINTSOURCE[23]Interrupt sourceI-AN28
VICVICINTSOURCE[24]Interrupt sourceI-AM28
VICVICINTSOURCE[25]Interrupt sourceI-AH24
VICVICINTSOURCE[26]Interrupt sourceI-AL28
VICVICINTSOURCE[27]Interrupt sourceI-AJ25
VICVICINTSOURCE[28]Interrupt sourceI-AP29
VICVICINTSOURCE[29]Interrupt sourceI-AK25
VICVICINTSOURCE[30]Interrupt sourceI-AN29
VICVICINTSOURCE[31]Interrupt sourceI-AM29
Copyright © 2004, 2006 ARM Limited. All rights reserved.ARM DDI 0287B
Non-Confidential