3.2.3. Selection between MPMC and SSMC as static memory controller

The chip selects for static memory are determined by the state of the MPMCnSMC signal:

Note

Dynamic memory is always controlled by the MPMC and the MPMCnSMC signal has no effect on the MPMC SDRAM bank select signals.

The multiplexing of the chip select signals from the MPMC and SSMC is done inside the ARM926PXP development chip before the memory remapping circuitry modifies the chip select lines.

This section describes the memory map after booting has completed and memory is mapped to its normal location. For details on aliasing of memory to the boot memory range at 0x000000000x03FFFFFF, see AHB memory alias for low memory.

The memory map for control signals CFGBRIDGEMEMMAP HIGH and MPMCnSMC LOW is shown in Figure 3.6.

Figure 3.6. Default AHB memory map with SMC

The memory map for control signals CFGBRIDGEMEMMAP HIGH and MPMCnSMC HIGH is shown in Figure 3.7. Part of the static memory range has been remapped to a bridge to off-chip peripherals.

Figure 3.7. AHB memory map without SMC

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