5.2.1. Registers

The base address of the ARM PrimeCell CLCDC is 0x10120000.

The following locations are reserved, and must not be used during normal operation:

The following locations have a different function in the ARM926PXP development chip PL110 than that used is the standard PL110 controller:

Table 5.1. PrimeCell CLCDC register differences

Address (Dev. Chip)Reset value (Dev. Chip)Description in PL110 TRMDifference for CLCDC in ARM926PXP development chip
0x101200180x0LCDControl, LCD panel pixel parametersCLCDC TRM lists address as 0x1012001C
0x1012001C0x0LCDIMSC, interrupt mask set and clear CLCDC TRM lists address as 0x10120018
0x10120800–0x10120C2C0x0Not presentHardware cursor registers from PL111 (see the ARM926EJ-S Technical Reference Manual for details)
0x10120FE00x93CLCDPeriphID0CLCDC TRM lists value as 0x10
0x10120FE40x10CLCDPeriphID1CLCDC TRM lists value as 0x11
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