3.1. Overview of the AMBA buses in the ARM926PXP development chip

The ARM926PXP development chip bus architecture is described in the following sections:


The bus system for the ARM926PXP development chip is highly configurable. This enables the chip to emulate many different system designs, but it also complicates configuration and use. The main areas of bus use that require attention are:

  • selecting the physical memory that is accessed at 0x0 after a reset

  • handling accesses to undefined areas that are remapped to external buses

  • enabling the static controller for static memory

  • recognizing that some buses cannot access devices located on a different bus

  • identifying bus masters that can access different memory regions in parallel.

For a production device based on the ARM926EJ-S, most of these issues would be resolved before the device was designed. However, many of these design choices must be handled by program design or configuration settings in ARM926PXP development chip the because it was produced for use in a development environment.

For more details on signals related to bus access, see the following manuals:

  • ARM926EJ-S PrimeXSys Virtual Component Technical Reference Manual

  • ARM926EJ-S Integration Guide

  • AMBA Specification

  • AMBA Design Kit Technical Reference Manual

  • AHB EASY Technical Reference Manual

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