4.3.29.  AHBMONCtrlReg

The AHB Monitor disables all the event counters at reset, but enables the Debug output. For normal device operation the information produced by the AHB Monitor is not required. AHBMONCtrlReg was included to enable or disable the AHB monitor module. The Track DBGACK bit was included to provide method of discounting bus activity caused by the processor operating in debug mode. It only affects the counters associated with the ARM-D and ARM-I layers, and the CtTotalCyclesNonDebug counter.

Table 4.17. AHBMONCtrlReg

BitsNameTypeFunction
31:3--Reserved, read undefined, must be written as zeros
2Track DBGACKRead/writeWhen set, it disables ARM x counters when DBGACK is asserted. Default value at reset is 0.
1Counter EnableRead/writeEnables all event counters. Default value at reset is 0.
0Debug EnableRead/writeEnables the debug output. Default value at reset is 1.
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