17.2. Functional description

Figure 17.1 shows a block diagram of the PrimeCell VIC interface.

Figure 17.1. VIC block diagram


A secondary interrupt controller can be implemented in external logic and connected to one of the VICINTSOURCE[31:24] signals. Use a secondary interrupt controller if there are too many external peripherals to manage with only the VICINTSOURCE[31:24] signals.

Copyright © 2004, 2006 ARM Limited. All rights reserved.ARM DDI 0287B