4.3.6.  Ct<layer>BurstIncr

The read count registers are associated with a specific AHB layer that contains a master that is capable of this burst format.

These registers contain the total count, read + write, of completed unspecified length burst transfers that have occurred on the associated AHB layer. The count is disabled by default and can be controlled through the AHBMONCtrlReg, and reset through the AHBMONRstCtrs.

Copyright © 2004, 2006 ARM Limited. All rights reserved.ARM DDI 0287B