4.3.10.  Ct<layer>BurstIncr8

The INCR8 burst count registers are associated with a specific AHB layer that contains a master that is capable of this burst format. This description is valid for the following registers:

These registers contain the total count, read + write, of completed INCR8 burst transfers that have occurred on the associated AHB layer. The count is disabled by default and can be controlled through the AHBMONCtrlReg, and reset through the AHBMONRstCtrs. The counter associated with the ARM D layer is also controlled by the DBGACK in relation to configuration, see AHBMONCtrlReg.

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