17.2.8. Interrupt control registers

The base address of the PrimeCell VIC is 0x10140000.


To ensure that the vector address register can be read in a single instruction, the PrimeCell VIC base address must be 0xFFFFF000,the upper 4K of memory. Placing the PrimeCell VIC anywhere else in memory increases interrupt latency as the ARM processor is unable to access the VICVectorAddr register using a single instruction.

Use the MMU in the ARM926EJ-S to cause the VIC to appear at 0xFFFFF000.

Copyright © 2004, 2006 ARM Limited. All rights reserved.ARM DDI 0287B