ARM926EJ-S Development Chip Reference Manual 3.2.5. AHB memory alias for low memory

3.2.5. AHB memory alias for low memory

Normally, fast dynamic memory resides at location 0x00000000. This area is used to store exception vector tables. Address remap functionality is provided to temporarily map an alias of another memory region to 0x00000000–0x03FFFFFF after a power-on reset.

The memory map outside the 0x00000000 to 0x03FFFFFF address range is only controlled by MPMCnSMC and CFGBRIDGEMEMMAP. Except for Figure 3.13 and Figure 3.16, all figures show the memory map for MPMCnSMC LOW and CFGBRIDGEMEMMAP LOW.

Figure 3.13 summarizes the effects of the remap signals on the AHB data and instruction buses.

Note

Only the combination of REMAPEXTERNAL HIGH and CFGBRIDGEMEMMAP LOW result in different mappings for the ARM I AHB master and the ARM D AHB master.

Figure 3.13. Supported address remap functionality for ARM D AHB

Figure 3.14 shows the internal bus map for:

REMAPSTATIC LOW (only dynamic memory in boot area)
MPMCnSMC X
CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
REMAPEXTERNAL LOW (boot memory is controlled by MPMC ).

Figure 3.14. Alias for REMAPSTATIC LOW

Figure 3.15 shows the internal bus map for:

REMAPSTATIC HIGH
MPMCnSMC LOW (the SSMC controls static memory)
CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
REMAPEXTERNAL LOW (boot memory is controlled by MPMC and SSMC).

Figure 3.15. Alias for REMAPSTATIC HIGH and MPMCnSMC LOW

Figure 3.16 shows the internal bus map for:

REMAPSTATIC HIGH
MPMCnSMC HIGH (the MPMC controls static memory)
CFGBRIDGEMEMMAP HIGH (AHB M1 determined by address range)
REMAPEXTERNAL LOW (boot memory is controlled by MPMC).

Figure 3.16. Alias for REMAPSTATIC HIGH and MPMCnSMC HIGH

Figure 3.17 shows the internal bus map for:

REMAPSTATIC HIGH
MPMCnSMC HIGH (the MPMC controls static memory)
CFGBRIDGEMEMMAP HIGH (AHB M1 access selected by address range)
REMAPEXTERNAL HIGH (boot memory is controlled off-chip).

Figure 3.17. Alias for REMAPEXTERNAL HIGH and CFGBRIDGEMEMMAP HIGH

Figure 3.18 shows the internal bus map for:

REMAPSTATIC HIGH
MPMCnSMC HIGH (the MPMC controls static memory)
CFGBRIDGEMEMMAP LOW (AHB M1 access selected by master used)
REMAPEXTERNAL HIGH (boot memory is controlled off-chip).

Figure 3.18. Alias for REMAPEXTERNAL HIGH and CFGBRIDGEMEMMAP LOW

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