4.3.24.  CtGxiRd<layer>Wait

The MBX GXI performs a read transfer completely disjoint from the address cycle. Transfer requests are acknowledged in the address cycle with the GAREADY signal, and transfers can be stalled by driving the GDREADY signal LOW. The MBX initiates a read transfer request by driving GWRITE LOW and GTRANS HIGH.

This description is valid for the following registers:

These registers contain the total count of wait cycles suffered by read transfers that have occurred on the MBX GXI bus. The count is disabled by default and can be controlled through the AHBMONCtrlReg, and reset through the AHBMONRstCtrs.

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