16.2.5. Implementation details

The following inputs are tied off:

The following outputs are unconnected:

Variations from the 16C550 UART

The PrimeCell UART varies from the industry-standard 16C550 UART device as follows:

  • receive FIFO trigger levels are 1/8, 1/4, 1/2, 3/4, and 7/8

  • the internal register map address space, and the bit function of each register differ

  • the deltas of the modem status signals are not available.

The following 16C550 UART features are not supported:

  • 1.5 stop bits (1 or 2 stop bits only are supported)

  • independent receive clock.

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