| Copyright © 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0290G |
| Non-Confidential | |
 PDF version | |
| Home > Cycle Timings and Interlock Behavior > About cycle timings and interlock behavior > Instruction sets |
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| Home > Cycle Timings and Interlock Behavior > About cycle timings and interlock behavior > Instruction sets | |||
For any equivalent instruction, the cycle timing behavior is always the same whether it is an ARM, Thumb or Thumb-2 instruction.
Instructions from all instruction sets are listed, but some instructions and some register combinations or addressing modes might not be available in all instruction sets.
| Copyright © 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0290G |
| Non-Confidential | |
| PDF version | |
| Home > Cycle Timings and Interlock Behavior > About cycle timings and interlock behavior > Instruction sets |