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The unaligned access handling is summarized in Table 6.1.
Table 6.1. Unaligned access handling
| CP15 register c1 U bit | CP15 register c1 A bit | Unaligned access model |
|---|---|---|
| 0[1] | 0a | Word-invariant ARMv5. See Word-invariant data access in ARMv6 (U=0)Word-invariant data access in ARMv6 (U=0)Word-invariant data access in ARMv6 (U=0). |
| 0 | 1 | Word-invariant natural alignment check. |
| 1 | 0 | ARMv6 unaligned half/word access, else strict word alignment check. |
| 1 | 1 | ARMv6 strict half/word alignment check. |
[1] Default value at reset. | ||
For a fuller description of the options available, see c1, Control Register.
| Copyright © 2005-2007 ARM Limited. All rights reserved. | ARM DDI 0290G |
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| Home > Unaligned and Mixed-Endian Data Access Support > Unaligned access support > Word-invariant mode and ARMv6 configurations |