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The ARM1156T2F-S processor supports the following data types:
doubleword (64-bit)
word (32-bit)
halfword (16-bit)
byte (8-bit).
When any of these types are described as unsigned, the N-bit data value represents a non-negative integer in the range 0 to +2N-1, using normal binary format.
When any of these types are described as signed, the N-bit data value represents an integer in the range -2N-1 to +2N-1-1, using two’s complement format.
For best performance you must align these as follows:
doubleword quantities must be aligned to eight-byte boundaries
word quantities must be aligned to four-byte boundaries
halfword quantities must be aligned to two-byte boundaries
byte quantities can be placed on any byte boundary.
The ARM1156T2F-S processor supports mixed-endian and unaligned access. For more details, see Chapter 6 Unaligned and Mixed-Endian Data Access Support.
You cannot use LDRD, LDM, LDC, STRD, STM, or STC instructions to access 32-bit quantities if they are not 32-bit aligned.