2.2.5. Cross trigger events

Figure 2.16 shows an example wrapper for all external classes of cross trigger output event.

Note

If timing constraints allow, you can remove the registers with (Timing) in Figure 2.16. These registers are included to simplify the synthesis process for this example.

Figure 2.16. Example output wrapper configurations

The external classes of cross trigger output event are:

Sticky class

A typical function for a sticky class signal is an interrupt. When the ECTTRIGOUT is used to drive an interrupt signal, the output is kept active until it is cleared by a write to the corresponding bit of the CTIINTACK register. The Acknowledge holder holds the acknowledgement until the MAPTRIGOUT is deactivated. The ECTTRIGOUTACK is tied LOW, and the corresponding ECTTIHSBYPASS is LOW.

Noack class

The wrapper used is the same as that for the sticky class. If the output trigger does not require an acknowledgement and all clock domains are the same, ECTTIHSBYPASS is HIGH. This means that the ECTTRIGOUT signal is the same as the MAPTRIGOUT signal.

This class is typically used where the clock domains between the source and destination are the same and the source is guaranteed to be at least one clock cycle. If the source signal is active for one clock cycle, you must ensure that there is no clock skew between source and destination.

In this class you can design the wrapper so that multiple shot events are supported. The ECT can be set up so that all handshaking is bypassed. The destination wrapper receives the source signal and then acknowledges it through another channel. When the source wrapper receives the acknowledgement it can then send another event. The logic design for the wrappers can vary according to your requirements.

Level/pulse class

A typical function for a level class is an ETM EXTIN signal. The ETM EXTIN input is level-sensitive. The ECTTRIGOUT has to keep the signal active for at least one clock cycle. This is achieved in the wrapper by feeding the ECTTRIGOUT back in to the ECTTRIGOUTACK. The ECTTISBYPASSACK is HIGH, ECTTIHSBYPASS is LOW, and the corresponding bit of the CTITRIGINCLEAR register is LOW.

Note

To generate a single clock cycle pulse you must remove the timing D-type from the wrapper.

Conditioned class

A typical function for a level class is a DBGRQ/DBGACK to and from an ARM core. DBGRQ is activated until DBGACK is received. The processor can enter debug mode without the ECT requesting it, for example after a breakpoint.

Most of the ARM cores do not support receiving a debug request while in debug mode. For this reason, the wrapper is required to gate the DBGRQ whenever DBGACK is asserted. The DBGACK signal from the CPU is a combinatorial output. Therefore even if the CTI operates in the same clock domain as the CPU, this signal must be registered in the wrapper before being used. You can also use DBGACK as an input trigger as shown in Figure 2.16. The trigger can then be propagated to the other cores in the system. ECTTIHSBYPASS is LOW and ECTCTISBYPASS is set according to the clock domains.

If the output trigger has to be a single clock length pulse then you have to add the necessary logic to ensure correct signal shaping.

Table 2.1 shows the use of the ECTTIHSBYPASS and ECTCTISBYPASS.

Table 2.1. Bypass modes

Bypass modesECTCTISBYPASSECTTIHSBYPASS
Handshaking and synchronization enabled. Used when clock domains are asynchronous.00
Handshaking enabled and synchronization disabled. Used when clock domains are synchronous but clock skew is unknown. Level class triggers.10
Handshaking disabled, synchronization enable/disable. Used when clock domains are synchronous and clock skew allows. Used when no acknowledge is required.x1
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