ARM1176JZF-S Technical Reference Manual: 3.2.4. c0, TCM Status Register

The purpose of the TCM Status Register is to inform the system about the number of Instruction and Data TCMs available in the processor.

Table 3.9 lists the purposes of the individual bits in the TCM Status Register.

In the ARM1176JZF-S processor there is a maximum of two Instruction TCMs and two Data TCMs.

The TCM Status Register is:

Figure 3.12 shows the bit arrangement for the TCM Status Register.

Figure 3.12. TCM Status Register format

Table 3.9 lists how the bit values correspond with the TCM Status Register functions.

Table 3.9. TCM Status Register bit functions

Bits	Field name	Function
[31:29]	-	Always b000.
[28:19]	-	UNP/SBZ
[18:16]	DTCM	Indicates the number of Data TCM banks implemented. b000 = 0 Data TCMs b001 = 1 Data TCM b010 = 2 Data TCMs All other values reserved
[15:3]	-	UNP/SBZ
[2:0]	ITCM	Indicates the number of Instruction TCM banks implemented. b000 = 0 Instruction TCMs b001 = 1 Instruction TCM b010 = 2 Instruction TCMs All other values reserved

Attempts to write the TCM Status Register or read it in User modes result in Undefined exceptions.

To use the TCM Status Register read CP15 with:

For example:

MRC p15,0,<Rd>,c0,c0,2    ; returns TCM status register

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