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The ARM1176JZF-S processor provides a number of features that enable the processor voltage to vary relative to the voltage of the rest of the system. For this purpose the processor optionally implements:
Placeholders for level shifters and clamps for some inputs and outputs including:
the debug interface
interrupt signals including the VIC interface
resets
clocks.
IEM register slices for the AXI level two interfaces.
The ETM and coprocessor interfaces do not implement level shifters or clamps.
Figure 10.1 shows the basic structure for IEM in the processor.
| Copyright © 2004-2009 ARM Limited. All rights reserved. | ARM DDI 0301H |
| Non-Confidential | |
| PDF version | |
| Home > Power Control > Intelligent Energy Management > Structure of IEM |