3.2.1. Cache size field, MBIR[2:0]

The cache size field specifies the size of the cache in your implementation of the ARM L210 module and therefore must always be the same. Table 3.1 shows the supported cache sizes.

Table 3.1. Cache size field encoding

Cache size MBIR[2:0]Cache size
b000Reserved
b001128K
b010256K
b011512K
b1001M
b1012M
b110Reserved
b111Reserved
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