3.3.17. DPM Command Register

IECDPMCR is a read and write register. A number of commands can be issued for each of the channels by the IEM software.

Figure 3.12 shows the bit assignments.

Figure 3.12. IECDPMCR Register bit assignments

IECDPMCR Register bit assignments

Table 3.18 lists the register bit assignments.

Table 3.18. IECDPMCR Register bit assignments

[31:12]ReservedReserved, read undefined, do not modify.
[11:8]DPMCH3CMDDPM Channel 3 command.
[7:4]DPMCH2CMDDPM Channel 2 command.
[3:0]DPMCH1CMDDPM Channel 1 command.

The commands and their encoding for each of the channels are shown in Table 3.19.

Table 3.19. DPMCHxCMD encoding bit assignments

b’0000FreezeThe channel is frozen and stops accumulating. This is also the reset value.
b’0001ResetThe channel is reset to zero.
b’0010AccumulateThe channel starts accumulating.

[1] The x indicates that the value applies to DPMCH1CMD, DPMCH2CMD, or DPMCH3CMD.

[2] x is an ignored bit

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