3.3.2. DVS Emulation Slot Time Register

IECDVSEMSTR is a read and write register. It enables software to program the length of each time slot in the PWM frame.

Figure 3.2 shows the register bit assignments.

Figure 3.2. IECDVSEMSTR Register bit assignments

IECDVSEMSTR Register bit assignments

Table 3.3 lists the register bit assignments.

Table 3.3. IECDVSEMSTR Register bit assignments

BitsNameDescription
[31:10]ReservedReserved, read undefined, do not modify.
[9:0]Slot timeThe time in μs for each slot of a PWM frame. This is reset to 0x63. For example, if you want each time slot to be 100μs in length, then the slot time bits must be programmed with 0x63. Similarly, if you want each time slot to be 200μs in length, then the slot time bits must be programmed with 0xC7[1].

[1] This register must only be changed when DVS emulation mode is disabled. If written to during DVS emulation mode, it can cause unpredictable behavior.

Note

The slot time relies on the IECDVSEMCLKEN input signal being pulsed at a frequency of 1 MHz.

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