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| Home > Programmer’s Model > Register descriptions > DPM Channel 2 Rate Register | |||
The IECDPM2RATE Register controls the rate that channel 2 of the DPM accumulates. It is a read and write register. The rate is an 8-bit fractional value, that is, it is a fraction of the maximum performance. The format of the rate is identical to the format of the IECDPCTGTPERF Register, that is, it has an inherent binary point.
Figure 3.13 shows the bit assignments for this register.
Table 3.20 shows the bit assignments for this register.