Intelligent Energy Controller Technical Reference Manual 3.3.27. IEC Identification Registers

3.3.27. IEC Identification Registers

The IECID0-3 Registers are four, 8-bit read-only registers that span address locations 0xFF0-0xFFC. The registers can conceptually be treated as one 32-bit register. These are used as a standard cross-peripheral identification system. The IECID Register is set to 0xB105F00D. Figure 3.17 shows the bit assignments for the IECID-03 registers.

Figure 3.17. Identification Register bit assignments

Note

When you design a systems memory map then you must remember that the register has a 4KB-memory footprint. All memory accesses to the identification registers must be 32-bit, using the LDR and STR instructions.

The four, 8-bit IEC identification registers are described in:

IEC Identification Register 0

The IECID0 Register is hard coded. The fields in the register determine the reset value. Table 3.38 lists the register bit assignments.

Table 3.38. IECID0 Register bit assignments

Bits	Name	Description
[31:8]	-	Reserved, read undefined
[7:0]	IECID0	These bits read back as `0x0D`

IEC Identification Register 1

The IECID1 Register is hard coded. The fields in the register determine the reset value. Table 3.39 lists the register bit assignments.

Table 3.39. IECID1 Register bit assignments

Bits	Name	Description
[31:8]	-	Reserved, read undefined
[7:0]	IECID1	These bits read back as `0xF0`

IEC Identification Register 2

The IECID2 Register is hard coded. The fields in the register determine the reset value. Table 3.40 lists the register bit assignments.

Table 3.40. IECID2 Register bit assignments

Bits	Name	Description
[31:8]	-	Reserved, read undefined
[7:0]	IECID2	These bits read back as `0x05`

IEC Identification Register 3

The IECID3 Register is hard coded. The fields in the register determine the reset value. Table 3.41 lists the register bit assignments.

Table 3.41. IECID3 Register bit assignments

Bits	Name	Description
[31:8]	-
[7:0]	IECID3	These bits read back as `0xB1`

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