3.3.3. DPC Target Performance Register

IECDPCTGTPERF is a write-only register. A write to this register sets the new fractional performance level, that is, a fraction of the maximum performance level.

Figure 3.3 shows the register bit assignments.

Figure 3.3. IECDPCTGTPERF Register bit assignments

IECDPCTGTPERF Register bit assignments

Table 3.4 lists the register bit assignments.

Table 3.4. IECDPCTGTPERF Register bit assignments

[31:8]ReservedReserved, read undefined, do not modify.
[7:0]IECDPCTGTPERFSets the target fractional performance level. At system reset, the value 0x80 (100%).
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