3.3.25. DPM Channel 3 High Register

The IECDPM3HI Register enables you to read the current count in the high 32-bits of channel 3 of the DPM. It is a read only register. When read it returns the previously captured count of the high 32-bits of channel 3 of the DPM. This count is captured when you read the low 32-bits of channel 3.


To read all 64-bits of channel 3 of the DPM, you must read the IECDPM3LO Register followed by a read of the IECDPM3HI Register. If you fail to follow this sequence then this results in an incorrect count for channel 3 when read.

Table 3.27 lists the register bit assignments.

Table 3.27. IECDPM3HI Register bit assignments

[31:0]IECDPM3HIHigh 32-bits of DPM channel 3. The reset value is 0x00000000.
Copyright © 2003, 2008 ARM Limited. All rights reserved.ARM DDI 0304C