Intelligent Energy Controller Technical Reference Manual 3.2. Summary of registers

3.2. Summary of registers

Table 3.1 summarizes the IEC registers in base offset order.

Table 3.1. Summary of registers

Name	Base offset	Type	Reset nPOR	Description
IECDPCCR	`0x000`	R/W	`0x1`	See DPC Control Register
IECDVSEMSTR	`0x004`	R/W	`0x63`	See DVS Emulation Slot Time Register
IECDPCTGTPERF	`0x008`	WO	`0x80`	See DPC Target Performance Register
IECDPCCRNTPERF	`0x00C`	RO	System dependent	See DPC Current Performance Register
IECIMSC	`0x010`	R/W	`0x3`	See Interrupt Mask Set and Clear Register
IECRIS	`0x014`	RO	`0x0`	See Raw Interrupt Status Register
IECMIS	`0x018`	RO	`0x0`	See Masked Interrupt Status Register
IECICR	`0x01C`	WO	`0x0`	See Interrupt Clear Register
IECCFGCPUFREQ	`0x020`	RO	System dependent	See Configured CPU Frequency Register
IECDPMFREQ	`0x024`	RO	System dependent	See DPM Frequency Register
IECCFGDCGIDXMAP00	`0x040`	RO	System dependent	See Configuration Fractional Index Map 00 Register
IECCFGDCGIDXMAP32	`0x044`	RO	System dependent	See Configuration Fractional Index Map 32 Register
IECCFGDCGIDXMAP64	`0x048`	RO	System dependent	See Configuration Fractional Index Map 64 Register
IECCFGDVCIDXMAP	`0x04C`	RO	System dependent	See Configuration DVC Index Map Register
	`0x050`-`0x05C`	-	-	Reserved. read undefined, do not modify
IECCFGDCGPERFMAP0	`0x060`	RO	System dependent	See Configuration Performance Map 0 Register
IECCFGDCGPERFMAP4	`0x064`	RO	System dependent	See Configuration Performance Map 4 Register
	`0x068`-`0x0FF`	-	System dependent	Reserved. read undefined, do not modify
IECDPMCR	`0x100`	R/W	`0x000`	See DPM Command Register
	`0x104`	-	-	Reserved. read undefined, do not modify
IECDPM2RATE	`0x108`	R/W	`0x80`	See DPM Channel 2 Rate Register.
IECDPM3RATE	`0x10C`	R/W	`0x80`	See DPM Channel 3 Rate Register
	`0x110`-`0x17F`	-	-	Reserved, read undefined, do not modify
IECDPMILO	`0x180`	RO	`0x00000000`	See DPM Channel 1 Low Register
IECDPM1H1	`0x184`	RO	`0x00000000`	See DPM Channel 1 High Register
IECDPM2LO	`0x188`	RO	`0x00000000`	See DPM Channel 2 Low Register
IECDPM2HI	`0x18C`	RO	`0x00000000`	See DPM Channel 2 High Register
IECDPM3LO	`0x190`	RO	`0x00000000`	See DPM Channel 3 Low Register
IECDPM3HI	`0x194`	RO	`0x00000000`	See DPM Channel 3 High Register
	`0x198`-`0xEFF`	-	-	Reserved, read undefined, do not modify
Integration Test Registers	`0xF00`-`0xF28`			See Test registers
	`0xF2C`-`0xFC8`	-	-	Reserved, read undefined, do not modify
IECPeriphID4	`0xFD0`	RO	`0x03`	See Peripheral Identification Register 4
IECPeriphID5	`0xFD4`	RO	`0x08`	See Peripheral Identification Register 5
IECPeriphID6	`0xFD8`	RO	Reserved	See Peripheral Identification Register 6
IECPeriphID7	`0xFDC`	RO	Reserved	See Peripheral Identification Register 7
IECPeriphID0	`0xFE0`	RO	`0x50`	See Peripheral Identification Register 0
IECPeriphID1	`0xFE4`	RO	`0x17`	See Peripheral Identification Register 1
IECPeriphID2	`0xFE8`	RO	`0x14`	See Peripheral Identification Register 2
IECPeriphID3	`0xFEC`	RO	`0x08`	See Peripheral Identification Register 3
IECID0	`0xFF0`	RO	`0x0D`	See IEC Identification Register 0
IECID1	`0xFF4`	RO	`0xF0`	See IEC Identification Register 1
IECID2	`0xFF8`	RO	`0x05`	See IEC Identification Register 2
IECID3	`0xFFC`	RO	`0xB1`	See IEC Identification Register 3

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