4.3.5. Integration Test Output Read or Set Register 1

IECITOP1 is a read and write register. In integration test mode, it enables outputs to be both written to and read from.

Figure 4.5 shows the bit assignments for the register.

Figure 4.5. IECITOP1 Register 1 bit assignments

IECITOP1 Register 1 bit assignments

Table 4.6 lists the register bit assignments.

Table 4.6. IECITOP1 Register 1 bit assignments

BitNameDescription
[31:4]-Reserved, read undefined, do not modify.
[3]IECSYNCMODEREQIntra-chip output. Writes to this bit set the value to be driven onto the IECSYNCMODEREQ output in integration test mode. Reads return the value of IECSYNCMODEREQ at the output of the test multiplexer. The reset value is 0.
[2]IECPWRREQIntra-chip output. Writes to this bit set the value to be driven onto the IECPWRREQ output in integration test mode. Reads return the value of IECPWRREQ at the output of the test multiplexer. The reset value is 0.
[1]IECCPUSLPINTIntra-chip output. Writes to this bit set the value to be driven onto the IECCPUSLPINT output in integration test mode. Reads return the value of IECCPUSLPINT at the output of the test multiplexer. The reset value is 0.
[0]IECCPUWUINTIntra-chip output. Writes to this bit set the value to be driven onto the IECCPUWUINT output in integration test mode. Reads return the value of IECCPUWUINT at the output of the test multiplexer. The reset value is 0.
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