2.1. Functional description

Figure 2.1 shows a block diagram of the IPCM.

Figure 2.1. IPCM block diagram

The IPCM contains three main functional blocks:

AHB interface

The AHB interface enables access from the system bus to the IPCM registers.

Mailboxes and control logic

The mailbox and control logic block contains all the mailbox registers and control logic.

Interrupt generation logic

The interrupt generation logic block generates the IPCM interrupt outputs from the current status of all the IPCM mailboxes.

Figure 2.2 shows the integration of the IPCM in a multiprocessing system.

Figure 2.2. IPCM integration in a multiprocessing system

For information on the Core Identification Module (CIM), see the ARM PrimeCell Core Identification Module (PL321) r0p0 Technical Reference Manual.

Copyright © 2003, 2004. ARM Limited. All rights reserved.ARM DDI 0306B
Non-Confidential