3.3.5. Mailbox Mode Registers

The read/write IPCMxMODE Registers define how the mailbox is used. The registers can only be written to when the mailbox is assigned, indicated by a bit in the Mailbox Source Register being set.

The Auto Acknowledge bit provides an acknowledge interrupt back to the source core when the Mailbox Destination Register has been cleared. The Auto Acknowledge indicates when all cores that have received a message have cleared their interrupts. The Auto Acknowledge bit must always be set when there is more than one destination core.

The Auto Link bit links adjacent mailboxes together to enable multiple messages to be sent sequentially by the source core without the requirement for the source core to be interrupted between messages. Instead of an acknowledge interrupt being sent back to the source core, which can be done manually by a single destination core or automatically using Auto Acknowledge, the linked mailbox message is sent. The order of linking is fixed. Mailbox?0 links to Mailbox?1, which can link to Mailbox?2, up to Mailbox?31.

The IPCMxMODE Registers are cleared when the Mailbox Source Register is cleared.

Figure 3.4 shows the register bit assignments.

Figure 3.4. IPCMxMODE Register bit assignments

Table 3.6 lists the register bit assignments.

Table 3.6. IPCMxMODE Register bit assignments

[31:2]-Read undefined. Write as zero.
[1]Auto LinkSet to enable Auto Link.
[0]Auto AcknowledgeSet to enable Auto Acknowledge.
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