5.1. About the BIU

The ARM968E-S processor uses the Advanced Microprocessor Bus Architecture (AMBA) Advanced High-performance Bus-Lite (AHB-Lite) interface. The AHB-Lite version of the AMBA interface addresses the requirements of synthesizable high-performance designs, including:

See the AMBA Specification (Rev 2.0) for a full description of this bus architecture.

The BIU implements a fully-compliant AHB-Lite bus master interface with an Instruction Prefetch Buffer (IPB) and an AHB write buffer to increase system performance. The BIU is the link between the processor’s Tightly-Coupled Memories (TCMs) and the external AHB memory. The AHB memory or the DMA must be used to initialize the TCMs and to access code and data that are not assigned to the TCM address space.

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