HADDR[31:0]

Output

Address bus.

HTRANS[1:0]

Output

Transfer type:

b00 = idle

b10 = nonsequential

b11 = sequential.

HBURST[2:0]

Output

BIU burst type:

b000 = single transfer

b001 = incrementing transfer of unspecified length

b011 = 4-beat incrementing burst

b101 = 8-beat incrementing burst

b111 = 16-beat incrementing burst.

HWRITE

Output

Transfer direction:

1 = write

0 = read.

HSIZE[2:0]

Output

Transfer size:

b000 = byte

b001 = halfword

b010 = word.

HPROT[3:0]

Output

BIU protection control:

bxxx0 = opcode fetch

bxxx1 = data access

bxx0x = User mode access

bxx1x = Supervisor mode access

bx0xx = nonbufferable access

bx1xx = bufferable access

b0xxx = noncachable access

b1xxx = cachable access.

HREADY

Input

Slave ready. Can be driven LOW to extend transfer.

HRESP

Input

Slave response. Reflects transfer status:

0 = okay

1 = error.

HWDATA[31:0]

Output

Write data bus.

HRDATA[31:0]

Input

Read data bus.

HMASTLOCK

Output

Bus locked. Indicates that processor has locked access to AHB bus. Asserted when executing SWP instructions to AHB address space.

HCLKEN

Input