2.3.1. Overview

With the JTAG-DP, IEEE 1149.1 scan chains are used to read or write register information. A pair of scan chain registers is used to access the main control and access registers within the Debug Port:

The scan chain model implemented by a JTAG-DP has the concepts of capturing the current value of APACC or DPACC, and of updating APACC or DPACC with a new value. An update might cause a read or write access to a DAP register that might then cause a read or write access to a debug register of a connected debug component. The operations available on JTAG-DP are described in the ARM Debug Interface v5 Architecture Specification and the ARM Debug Interface v5.1 Architecture Supplement. The implemented registers present within the supplied JTAG-DP are described in Implementation specific details.

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