8.6.5.  Trigger Multiplier Register, 0x108

This register contains the selectors for the Trigger Counter Multiplier. Several multipliers can be selected to create the required multiplier value, that is, any value between 1 and approximately 2x109. The default value is multiplied by 1, 0x0.

Writing to this register causes the internal trigger counter and the state in the multipliers to be reset to initial count position, that is, trigger counter is reloaded with the Trigger Counter Register value and all multipliers are reset.

Figure 8.5 shows the Trigger Multiplier Register bit assignments.

Figure 8.5. Trigger Multiplier Register bit assignments


Table 8.7 shows the Trigger Multiplier Register bit assignments.

Table 8.7. Supported Trigger Multiplier Register bit assignments

BitsTypeNameDescription
[31:5]--Reserved RAZ/SBZP
[4]R/WMult64kMultiply the Trigger Counter by 65536 (216)
[3]R/WMult256Multiply the Trigger Counter by 256 (28)
[2]R/WMult16Multiply the Trigger Counter by 16 (24)
[1]R/WMult4Multiply the Trigger Counter by 4 (22)
[0]R/WMult2Multiply the Trigger Counter by 2 (21)

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