8.6.9. Formatter and Flush Status Register, 0x300

The Formatter and Flush Status Register is read only. This register indicates the current status of the formatter and flush features available in the TPIU. Figure 8.8 shows the Formatter and Flush Status Register bit assignments.

Figure 8.8. Formatter and Flush Status Register bit assignments


Table 8.10 shows the Formatter and Flush Status Register bit assignments.

Table 8.10. Formatter and Flush Status Register bit assignments

BitsTypeNameDescription
[31:3]--Reserved RAZ/SBZP.
[2]ROTCPresent

If this bit is set then TRACECTL is present. If no TRACECTL pin is available, that is, this bit is zero, then the data formatter must be used and only in continuous mode.

This is constrained by the CSTPIU_TRACECTL_VAL Verilog `define, which is not user modifiable, and the external tie-off TPCTL. If either constraint reports zero/LOW then no TRACECTL is present and this inability to use the pin is reflected in this register. See TRACECTL removal for more information.

[1]ROFtStoppedFormatter stopped. The formatter has received a stop request signal and all trace data and post-amble has been output. Any more trace data on the ATB interface is ignored and ATREADYS goes HIGH.
[0]ROFlInProgFlush In Progress. This is an indication of the current state of AFVALIDS.

Copyright © 2004-2009 ARM. All rights reserved.ARM DDI 0314H
Non-Confidential